1. Field of the Invention
The present invention relates to methods of wiring formation and manufacturing electronic components, and more specifically, it relates to methods of fine wiring formation using a semi-additive process.
2. Description of the Related Art
In semiconductor integrated circuits, semiconductor devices, wiring substrates, etc., fine and low-resistance wiring patterns are necessary. Therefore, an aspect ratio (wiring thickness/wiring width) of the wiring pattern must be large. In order to form a wiring pattern having a high aspect ratio, a semi-additive process has been generally used.
A method of formation of the wiring pattern by the conventional semi-additive process is shown in FIGS. 1A to 1D. A feeder film 22 is formed on the entire surface of the substrate 21, thereafter a photoresist is coated thereon. Then, the photoresist is patterned to form a resist pattern 23, for a selective electrolytic plating, on the feeder film 22 as shown in FIG. 1A. As the feeder film 22, generally, a two-layer film composed of an upper layer made of Cu and a lower layer made of Ti, is used in the case of Cu plating, and an upper layer made of Pd and a lower layer made of Ti, is used in the case of Au plating.
Then, by immersing the substrate 1 into an electrolytic plating solution, and passing a current through the feeder film 22 as an electrolytic plating electrode, as shown in FIG. 1B, the plating metal is deposited on the feeder film 22 in an area exposed from the resist pattern 23, and a plated wiring 24 is formed. After the completion of the electrolytic plating, the substrate 21 is washed, then, the resist pattern 23 is peeled away as shown in FIG. 1C.
Thereafter, by completely etching the feeder film 22 exposed from the plated wiring 24, the wiring pattern, having a desired pattern, composed of the feeder film 22 and the plated wiring 24 as shown in FIG. 1D is obtained.
In the aforementioned method of fine wiring formation, as shown in FIG. 1D, the exposed portion of the feeder film 22 is removed by the etching after forming the plated wiring 24, and dry etching or wet etching methods are used.
The dry etching methods include ion milling, reactive ion etching (RIE), and others. By using these methods, it is possible to form the fine wiring pattern in which the line and space (hereafter described as L/S) is 5 xcexcm or less.
In the dry etching methods, however, expensive apparatuses are required, and therefore, the manufacturing cost is very high. Furthermore, in the ion milling, it is not possible to selectively etch only the feeder film, but the plated wiring and the substrate are etched together with the feeder film so that problems of etching residues and substrate damage occur. In the reactive ion etching, there is a problem in that a suitable material for the feeder film has not been identified.
On the other hand, in the wet etching methods, hydrofluoric acid is used in the case of the feeder film made of Cu or Ti, and a mixture of nitric acid and hydrochloric acid is used in the case of the feeder film made of Pd. The wet etching methods is very low in the cost compared to the dry etching methods, and it is easy to selectively etch only the feeder film.
Because the wet etching is isotropic, however, when the feeder film 22 is wet etched, as shown in FIG. 2, the feeder film 22 under the plated wiring 24 is also side-etched to cause an undercut 25 under the plated wiring 24 so that defects such as insufficient adhesion and peeling of the wiring may be caused. Therefore, in the wet etching, there is a limit in accuracy at L/S=5 xcexcm to 10 xcexcm, and then a fine wiring in which the L/S is 5 xcexcm or less could not been obtained.
In order to overcome the problems described above, preferred embodiments of the present invention provide a method of wiring formation wherein fine wiring is accurately formed by the semi-additive process using wet etching to remove the feeder film, and to provide an electronic component.
According to one preferred embodiment of the present invention, a method of wiring formation includes the steps of forming a feeder film partially on a substrate, forming on the substrate a plating base film by using a physical film making method such that the plate base film partially overlaps the feeder film, forming a plated wiring on the plating base film using an electrolytic plating, and selectively removing at least an area of the feeder film which is exposed from the plated wiring, using a wet etching.
The types of substrates used in the methods of preferred embodiments of the present invention are not particularly limited, and semiconductor integrated circuits and semiconductor devices, semiconductor substrates and ceramic substrates for wiring substrates, glass epoxy substrates, and other suitable substrates may be used.
The step of forming the plating base film on the substrate such that the plating base film has a desired pattern, may include forming a substrate metal on the entire substrate, thereafter by etching the substrate metal, or the plating base film may be formed by a lift-off method after depositing the substrate metal on the substrate from above a resist pattern.
According to preferred embodiments of the present invention, because the plating base film is formed so as to overlap the feeder film on the substrate using the physical film making method, and the plated wiring is formed thereon, even if all of the feeder film were removed by etching during the etching of the feeder film, only a portion of the plating base film is caused to be elevated and separated from the substrate due to an undercut and a space caused in a portion of the plating base film, most of the plating base film is not peeled off the substrate. Therefore, the process is usable for wiring patterns containing patterns of fine wire width, so that it becomes possible to form wiring patterns of fine wire width by using the semi-additive process in which the feeder film is removed using wet etching.
Preferred embodiments of the present invention include the case in which the steps are applied to a portion of the wiring pattern. For example, a conventional method may be used for a portion containing relatively wide wire width, and the methods of preferred embodiments of the present invention may be applied only to a portion containing fine wire width.
According to another preferred embodiment of the present invention, the method of wiring formation includes the steps of forming a feeder film partially on a substrate, forming on the substrate a resist pattern which has an opening defining a wiring forming area, such that a portion of the feeder film is exposed by the opening of the resist pattern, forming a plating base film at least on the substrate in the opening using a physical film making method, forming a plated wiring on the plating base film in the opening using an electrolytic plating, removing the resist pattern, and selectively removing at least an area in the feeder film which is exposed from the plated wiring, using a wet etching.
According to the method of this preferred embodiment, because the feeder film is exposed in a portion of the opening portion of the resist pattern, and the plating base film is formed at least in the opening of the resist pattern using the physical film making method, the plating base film can be formed to overlap the feeder film by the plating base film, even if all of the feeder film were removed by etching during the etching of the feeder film, only a portion of the plating base film is elevated and separated from the substrate due to an undercut caused in a portion of the plating base film, and the plating base film is not peeled off the substrate. Therefore, the steps of this method are usable for wiring patterns containing patterns of fine wire width, so that it becomes possible to form wiring patterns of fine wire width by the semi-additive process in which the feeder film is removed using the wet etching.
In addition, because the plated wiring is grown in the opening portion of the resist pattern, the plating metal is not deposited outside of the opening portion, and the pattern precision of the plated wiring is greatly improved.
It is preferable that a width of a portion of the plate base film that is stacked on the feeder film is wider than the smallest wire width of the feeder film.
In this case, because the wire width of the portion of the plating base film stacked on the feeder film is wider, even if an undercut were caused in the portion being stacked on the plating base film during the etching of the feeder film, the plating base film can be prevented from being completely elevated and separated from the substrate, and the adhesiveness between the plating base film and the substrate is greatly improved.
The plating base film may include an adhesive layer of a diffusion preventive layer as a lower layer. In this case, it is possible to improve the adhesiveness between the plating base film and the substrate or to prevent the plating base film from being diffused into the substrate.
The methods of preferred embodiments of the present invention are suitably applied to various methods for manufacturing electronic components, especially electronic components having fine wiring patterns and used for a high frequency application.
For the purpose of illustrating the present invention, there is shown in the drawings several forms that are presently preferred, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.
Other features, elements, characteristics and advantages of the present invention will become more apparent from the detailed description of preferred embodiments below with reference to the attached drawings.